Show HN: Booley – open-source IDE for agentic chip designhttps://github.com/boldaxolotl/booley
I am a digital design engineer, and my day job is designing chips (mostly IP blocks, not full chips) in SystemVerilog. At the start of 2026 I started experimenting with LLM agents like Claude and Codex, and realized that they are very capable not just at software and scripts, but at hardware design as well! But after the initial excitement, I started running into repeating failures and friction: - In chip design, we run a lot of heavy EDA tools: simulation, synthesis, linters. LLM agents often skipped those checks unless explicitly prompted - SystemVerilog code is not executed line-by-line as…